Add OPL4 playback and analyzer support
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/*
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* Copyright 2007, 2015 Alex Makeev
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*
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* This file is part of ZXMAK2 (ZX Spectrum virtual machine).
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*
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* ZXMAK2 is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* ZXMAK2 is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with ZXMAK2. If not, see <http://www.gnu.org/licenses/>.
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*
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* Description: Z80 CPU Emulator [CB prefixed opcodes part]
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* Date: 13.04.2007
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*
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*/
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namespace ZXMAK2.Engine.Cpu.Processor
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{
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public partial class Z80Cpu
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{
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private void CB_RLC(byte cmd) // RLC r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_RLC(_regGetters[r]()));
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}
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private void CB_RRC(byte cmd) // RRC r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_RRC(_regGetters[r]()));
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}
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private void CB_RL(byte cmd) // RL r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_RL(_regGetters[r]()));
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}
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private void CB_RR(byte cmd) // RR r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_RR(_regGetters[r]()));
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}
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private void CB_SLA(byte cmd) // SLA r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_SLA(_regGetters[r]()));
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}
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private void CB_SRA(byte cmd) // SRA r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_SRA(_regGetters[r]()));
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}
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private void CB_SLL(byte cmd) // *SLL r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_SLL(_regGetters[r]()));
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}
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private void CB_SRL(byte cmd) // SRL r
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{
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var r = cmd & 7;
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_regSetters[r](ALU_SRL(_regGetters[r]()));
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}
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private void CB_BIT(byte cmd) // BIT r
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{
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var r = cmd & 7;
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var b = (cmd & 0x38) >> 3;
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ALU_BIT(_regGetters[r](), b);
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}
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private void CB_RES(byte cmd) // RES r
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{
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var r = cmd & 7;
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var m = ~(1 << ((cmd & 0x38) >> 3));
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_regSetters[r]((byte)(_regGetters[r]() & m));
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}
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private void CB_SET(byte cmd) // SET r
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{
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var r = cmd & 7;
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var m = 1 << ((cmd & 0x38) >> 3);
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_regSetters[r]((byte)(_regGetters[r]() | m));
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}
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private void CB_RLCHL(byte cmd) // RLC (HL)
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_RLC(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_RRCHL(byte cmd) // RRC (HL)
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_RRC(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_RLHL(byte cmd) // RL (HL)
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_RL(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_RRHL(byte cmd) // RR (HL) [15T]
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_RR(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_SLAHL(byte cmd) // SLA (HL) [15T]
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_SLA(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_SRAHL(byte cmd) // SRA (HL) [15T]
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_SRA(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_SLLHL(byte cmd) // *SLL (HL) [15T]
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_SLL(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_SRLHL(byte cmd) // SRL (HL)
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{
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// 15T (4, 4, 4, 3)
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val = ALU_SRL(val);
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_BITHL(byte cmd) // BIT (HL) [12T]
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{
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// 12T (4, 4, 4)
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var b = (cmd & 0x38) >> 3;
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var val = RDMEM(regs.HL); Tact += 4;
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ALU_BITMEM(val, b);
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}
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private void CB_RESHL(byte cmd) // RES (HL) [15T]
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{
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// 15 (4, 4, 4, 3)
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var m = (byte)~(1 << ((cmd & 0x38) >> 3));
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val &= m;
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WRMEM(regs.HL, val); Tact += 3;
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}
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private void CB_SETHL(byte cmd) // SET (HL) [15T]
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{
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// 15T (4, 4, 4, 3)
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var m = (byte)(1 << ((cmd & 0x38) >> 3));
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var val = RDMEM(regs.HL); Tact += 3;
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RDNOMREQ(regs.HL); Tact++;
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val |= m;
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WRMEM(regs.HL, val); Tact += 3;
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}
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}
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}
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